An 8-bit 2-V 2-mW 0.25-mm/sup 2/ CMOS DAC
Resource
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Journal
Advanced System Integrated Circuits 2004
Pages
Proceeding-s
Date Issued
2004-08
Date
2004-08
Author(s)
DOI
N/A
Abstract
A low-voltage low-power small area digital-to-analog (DAC) for mixed-signal applications is introduced. A full equally weighted current steering DAC is a performance-efficient architecture for 8-bit resolution, due to almost all the current taken from the supply is used for the output signal. The current steering architecture is also highly suitable for high-speed operation and requires no calibration, trimming, or dynamic averaging. The circuit operates from a 2-V power supply in a standard 0.25 um CMOS technology. The measured DNL/INL is 0.23/0.3, and output 200-kHz signal achieves 50 dBc SFDR at 10 MS/s update rate with power dissipation of 2 mW.
SDGs
Type
journal article
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