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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
A 3.6GHz 1MHz-Bandwidth Delta-Sigma Fractional-N PLL with a Quantization-Noise Shifting Architecture in 0.18μm CMOS
Details
A 3.6GHz 1MHz-Bandwidth Delta-Sigma Fractional-N PLL with a Quantization-Noise Shifting Architecture in 0.18μm CMOS
Journal
IEEE Symposium on VLSI Circuits
Pages
114-115
Date Issued
2011-06
Author(s)
W.-H. Chiu
TSUNG-HSIEN LIN
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/366792
Type
conference paper