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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Hardware Implementation Issues on Viterbi Decoder
Details
Hardware Implementation Issues on Viterbi Decoder
Date Issued
2004-05-31
Date
2004-05-31
Author(s)
Wu, Meng-Hau
DOI
246246/2006092815521274
URI
http://ntur.lib.ntu.edu.tw//handle/246246/2006092815521274
Abstract
Review of Viterbi algorithm Hardware implementation issues Branch Metric Computation (BMC) Add-Compare-Select (ACS) Survivor Memory Management (SMM) Conclusion Reference
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Publisher
臺北市:國立臺灣大學電機工程學系
Type
report
File(s)
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Name
group meeting 20040531.ppt
Size
1.26 MB
Format
Microsoft Powerpoint
Checksum
(MD5):eea956c0557b4c96055792f5c3254c85
