Transceiver implementation for low-speed power line communication
Date Issued
2009
Date
2009
Author(s)
Chou, Zong-Han
Abstract
With the development of semiconductor technology, many electronic products 1re integrated with CMOS circuit. This thesis uses TSMC 0.35 micron 2P4M CMOS technology to implement a transceiver compatible with BS EN50065-1 class C standard. This work included two chips. One is an automatic gain control amplifier with fifty-six voltage gains, and the other is a power line communication transceiver with FSK modulation. he feed-forward automatic gain control amplifier is composed of programmable gain amplifier, peak detector, analog-to-digital converter, and control unit. The die area is 1.41mm ? 1.64mm, and the power consumption is 2.12mW. On the other hand, the power line communication transceiver which is compatible with BS EN50065-1 class C standard included FSK signal generator, programmable gain amplifier, low pass filter, peak detector, and hysteresis comparator with total die area of 1.68mm ? 1.929mm, and the power consumption is 43.26mW..
Subjects
power line communication
AGC
Type
thesis
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ntu-98-J96921037-1.pdf
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