Triple-push oscillator approach: theory and experiments
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
36
Journal Issue
10
Pages
1472--1479
Date Issued
2001
Author(s)
Yu-Lung Tang
Abstract
This paper presents the theory and experiments of the triple-push oscillator approach. This oscillator architecture is combined with three identical oscillator subcircuits. An analytical mode analysis is used to describe the behavior of all modes. As will be shown, odd-mode currents in each oscillator subcircuit have a 120/spl deg/ phase shift to one another and thus produce in-phase combining for the third harmonic. The time domain analysis was performed to simulate a triple-push oscillator, showing that the phenomenon of 120/spl deg/ phase shift exists among each oscillator subcircuit. To prove this concept, a 4.9-GHz hybrid bipolar junction transistor (BJT) circuit and a 28.4-GHz heterojunction bipolar transistor (BJT) MMIC chip were demonstrated. The measured results showed that the 4.9-GHz BJT triple-push oscillator delivered an output power of 1.0 dBm at 4.9 GHz with 12.0-dB fundamental rejection, and the 28.4-GHz HBT MMIC chip exhibited a measured center frequency at 28.4 GHz with an output power of -15.4 dBm, while the output powers of the fundamental and the second harmonic signals were suppressed to -21 and -34 dBm.
SDGs
Type
journal article