A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits

Resource

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 20 (2): 343-348

Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Journal Volume

20

Journal Issue

2

Pages

343-348

Date Issued

2001

Date

2001

Author(s)

Ruan, Shanq-Jang

Shang, Rung-Ji

Lai, Feipei

Tsai, Kun-Lin

URI

Type

journal article

File(s)

Name

13.pdf

Size

163.88 KB

Format

Adobe PDF

Checksum

(MD5):b9988a669d19b959a31d73086806f003