A split-based digital background calibration technique in pipelined ADCs
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
56
Journal Issue
11
Pages
855-859
Date Issued
2009
Author(s)
Hung, L.-H.
Abstract
A digital background calibration technique is proposed to correct gain errors in pipelined analog-to-digital converters (ADCs). The calibration technique performs the error estimation and the adaptive error correction based on the concept of split ADCs. With the 1- or 1.5-bit realization in pipelined stages, capacitor-mismatch errors can be merged with gain errors, and the proposed calibration technique can be utilized. Behavioral simulations show that the signal-to-noise-and-distortion ratio of a 12-bit pipelined ADC with an 8-bit gain accuracy and the capacitor mismatch σ = 0.125% can be improved from 56.4 to 73.8 dB. The calibration process converges in approximately 200000 cycles. © 2009 IEEE.
Subjects
Adaptive systems; Analog-to-digital conversion; Digital background calibration; Pipelined analog-to-digital converters (ADCs)
Other Subjects
Adaptive systems; Calibration; Digital to analog conversion; Error correction; Pipelines; Signal to noise ratio; Behavioral simulation; Calibration process; Calibration techniques; Capacitor mismatch; Capacitor mismatch errors; Digital background calibration; Pipelined analog-to-digital converter; Signal to noise and distortion ratio; Analog to digital conversion
Type
journal article