A GA-based Automatic Layout System for Analog IC Layout Design
Date Issued
2008
Date
2008
Author(s)
Cheng, Che-Hsin
Abstract
Due to the continuous breakthrough of manufacturing process and market expansions in semiconductor industry, semiconductor product development time is more and more tighten for reducing time to market, and increasing the benefits of the upstream and downstream members in the design chain. The focus of this research is the development of automatic layout system which is expected to improve the layout design procedure for analog IC product developments. bviously, layout extremely affects the performance of analog IC products, and it is truly a time-consuming work to develop an analog IC products. Moreover, the layout design procedure of analog IC highly depends on designer’s experience and expertise. In order to improve the efficiency of analog IC product development process, automatic layout system (ALS) is established in this research for providing layout design pattern quickly. Core chip area utility ratio, input/output relationship between components and the power consumption produced from thermal noise of analog circuits are concerned in automatic layout system, and layout patterns through a revised tree-structure methodology can be acquired quickly. The layout problem is solved through systematic layout planning (SLP) process flow and genetic algorithm (GA). Designers can acquire the suitable layout pattern immediately from automatic layout system.o verify this automatic layout system, two existing analog IC products are chosen as testing samples. The comparisons between actual layout and layout from automatic layout system are listed in the following content.
Subjects
Analog IC
Automatic Layout System
Chip Area Utility Ratio
Input/Output Relationship
Power Consumption
Genetic Algorithm
Type
thesis
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