SOC Test Scheduling Using Sequence-Pair Representation
Date Issued
2005
Date
2005
Author(s)
Huang, Chih-Chiang
DOI
en-US
Abstract
With the growing complexity of SOC designs, the SOC test scheduling problem becomes a great issue. A good test scheduling can greatly decrease the total test time. When we investigate the scheduling problem, the power consumption, TAM bus assignment, and individual test time must all be considered. Hence, the test scheduling can be thought as the 3-D bin packing problem.
In this thesis, we adopt the Sequence-Pair representation combining with the Simulated-Annealing process to construct the basic frame. Using the shortest-first concept, we proposed our initial scheduling method to generate a legal result instead of generating it randomly which is experimentally proven to be time wasting. Besides, the tree graph comprehended in Sequence-Pair is used to check the constraints when doing perturbations. The experimental results show that we can obtain a better solution within an acceptable run time by our proposed algorithm.
Subjects
測試
排程
序列組表示法
test
scheduling
sequence-pair
Type
thesis
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