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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Compact Gate Tunneling Current Model Considering Distributed Effect for Sub-100nm NMOS Devices with Ultra-thin (1nm) Gate Oxide
Details
Compact Gate Tunneling Current Model Considering Distributed Effect for Sub-100nm NMOS Devices with Ultra-thin (1nm) Gate Oxide
Journal
IEDMS
Date Issued
2006-12
Author(s)
C. H. Lin
J. B. Kuo
K. W. Su
S. Liu
JAMES-B KUO
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/325390
Type
conference paper