CMOS Millimeter Wave Circuit Design Techniques for W-band Receiver Front-End

New sensor technology enables the generation of passive millimeter-wavePMMW) imaging at video-rate, which has the ability to form images in low-visibilityondition such as haze, fog, clouds, or smoke. In recent years, many critical circuitsperated at W-band have been fabricated in CMOS technology to demonstrate theotential of CMOS circuits at W-band. For the demand of low cost, low power andigh integration, this thesis presents the V-band and W -band LNAs and W-bandeceiver in 0.13-μm and 65-nm CMOS technologies. V-band LNA is fabricated in a 0.13-μm CMOS technology. This LNA employsm-boosted and current reused techniques to achieve better noise performance andower power consumption under the same gain requirement. The measured peakoltage gain is 20.4dB at 54GHz excluding the loss of balun and open-drain stage.he measured average noise figure is 9dB with a minimum of 7dB at 59GHz. TheIP3 is –15dBm while the core area of LNA is 0.4 x 0.37 mm2 and consumes 7.2mWith supply voltage of 1.2V. Using the same current reused technique, the W-bandLNA is designed in a 65-nm CMOS technology. The measured S21 is 11dB at03GHz with 10dB noise figure. The IIP3 is about –14dBm while the area is 0.17 x.38 mm2 and consumes 25mW with 1.5V supply.he W-band receiver is designed in CMOS 65-nm technology with 1V supply.his highly integrated receiver, which employs the heterodyne architecture, provideshe function of PMMW imaging and data communication. The proposed frequencyoubler using an injection-locked oscillator operated at the voltage-limited region caneduce the complexity of frequency synthesizer. The simulated maximum conversionain is 42dB at 102GHz with bandwidth of 4GHz and noise figure of 12.2dB. TheIP3 is about -26dBm while the area is 0.95 x 0.8 mm2 and consumes 110mW.