Design of Comparator-Based Switched-Capacitor Second-Order Sigma-Delta Modulator in Low-Temperature Poly-Silicon Thin-Film Transistor Technology
Date Issued
2008
Date
2008
Author(s)
Lin, Chan-Fei
Abstract
With the development of the low-temperature poly-silicon thin-film transistor (LTPS-TFT) process, the peripheral circuits of the display panel that are realized by CMOS process in the past can be gradually implemented by LTPS-TFT. The ultimate goal is to integrate the whole system on a panel (SoP). In touch panel applications, a high-resolution data converter with low conversion-rate is required to convert the analog sensor signals to the digital bit streams that can be processed by DSP. The best candidate for this kind of application is the sigma-delta (ΣΔ) analog-to-digital converters (ADCs). In a ΣΔ ADC, the ΣΔ modulator dominates the performance of the whole ADC. Thus, this thesis focuses on the implementation of a second-order ΣΔ modulator in the LTPS-TFT technology. System-level simulations are firstly performed to select the four integrator gains in the modulator. Two proposals of circuit techniques are used to solve the serious non-idealities in the LTPS-TFT technology. First, the comparator-based switched-capacitor (CBSC) technique is adopted to implement the integrators due to the severe process variations and channel-length modulation effect in the LTPS-TFT technology. Second, the offset-compensated circuit is added to the integrators since the threshold voltages of the LTPS TFTs are sensitive to process, temperature, and the location on the chip. This sensitivity induces large offset voltages in the comparators of the integrators. Finally, the experimental modulator is realized by using the proposed offset-compensated CBSC integrators. With the help of the proposed duty-cycle control method, it has 69dB dynamic range and 65.6dB peak SNDR in 1.56-kHz signal bandwidth for oversampling ratio of 128.
Subjects
CBSC
sigma-delta modulator
LTPS
TFT
Type
thesis
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