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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
A delay-locked loop with digital background calibration
Details
A delay-locked loop with digital background calibration
Journal
IEEE Asian Solid-State Circuits Conference
Pages
317-320
Date Issued
2009-11
Author(s)
Wei-Ming Lin
Kuang-Fu Teng
SHEN-IUAN LIU
DOI
10.1109/ASSCC.2009.5357157
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/352093
SDGs
[SDGs]SDG7
Type
conference paper
