Metal-gate/high-κ CMOS scaling from Si to Ge at small EOT
Journal
ICSICT-2010 - 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Pages
836-839
Date Issued
2010
Author(s)
CHIEH-HSIUNG KUAN
Abstract
Continuously down-scaling EOT and improving mobility are required for CMOS device. Small 0.6~1 nm EOT and low V t of ~0.15 V are achieved in CMOS by using higher κ gate dielectric and novel process. The ultimate EOT scaling is limited by the inserted ultra-thin SiON interfacial layer in high-κ/Si to reduce the mobility degradation. Further mobility improvement is obtained by using Ge channel MOSFET that has 2.5X better high-field hole effective mobility than the SiO 2 /Si universal mobility at an E eff of 1 MV/cm.
SDGs
Type
conference paper