An RF Transceiver BIST Technique Based on Spectral Power Extraction
Date Issued
2006
Date
2006
Author(s)
Hung, Tzu-Li
DOI
en-US
Abstract
Wireless communication has become more appealing than ever due to its convenience and popularity. As the demand increasing explosively, mass production has brought down the gross profit and test cost has emerged as an important part in the overall revenue. RF communication is evolving towards higher-frequency band to provide higher transmission speed, requiring more investment in test equipments cost.
RF testing technologies have been developed for many years. In lack of a systematic and widely-accepted methodology, RF testing diversifies because the test includes not only the common spot defect such as open or short circuits, but the parametric drift caused by process variation. Traditionally the parametric tests are carried out on automatic test equipments (ATE). ATE can generate the required test stimuli and directly measure the interested parameters. Nevertheless extravagantly-cost high-speed ATE has urged the development of more efficient and inexpensive test methods. The loop-back test is among one of the most popular technique. It utilizes the RF transmitter as the test stimuli generator, and gathers the response at the baseband end after the downconversion process handled by the receiver circuits, eliminating the requirement of high-end ATE.
Loop-back technique neglected the occurrence of a faulty transmitter. In such a case the fault cannot be detected by the test system. The increasing density of integration has raised the severity of coupling effect, such as crosstalk between signals, introducing the degradation on signal quality. In this thesis a novel RF testing technique based on spectral power extraction is presented. Inspired by the topology of the spectrum synthesizer, the proposed method exploits the on-chip RF receiver chain to test for the phase-locked loop (PLL) frequency synthesizer. Parameters such as gain, nonlinearity can be evaluated as well. By measuring the dc-like output of the received-signal strength indicator (RSSI) the test cost is reduced since low-cost ATE can replace the high-end ones.
We use software simulation to verify the proposed method by applying it to a Bluetooth transceiver model. The non-ideality is injected into the behavior models of the circuit blocks. The proposed method is proved effective and accurate in measurement of test targets.
Subjects
內建自我測試
可測試性設計
類比測試
混合式信號測試
射頻電路測試
收發器測試
BIST
DfT
Analog test
Mixed-signal test
RF test
Transceiver Test
Type
thesis
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