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Java 虛擬機器的省電設計
Low Power Design for Java Virtual Machine
Date Issued
2005
Date
2005
Author(s)
Tseng, Ching-Shiu
DOI
en-US
Abstract
Memory system is a main concern to embedded system engineers since it dominates the cost, power and performance of mobile embedded systems. In particular, emerging memory technology, the flash memory is becoming an indispensable component in mobile embedded systems due to its versatile features: non-volatility, solid-state reliability, low power consumption.
NAND flash has the nature of high density and low cost. With the shadowing technique support, NAND flash will replace NOR flash for the embedded memory system code storage in nearly future. The more advanced solution is NAND+RAM. Neither NOR flash memory nor mask ROM is used in this architecture; it uses NAND flash memory for code storage. Copying the whole software executable binary code into RAM offers the best performance possible at run time.
With the advantage of portability, it is more important to implement Java system for embedded devices. The performance is a major drawback of Java system, especially for resource-limited embedded devices. Therefore, if becomes an interesting topic to improve the Java performance for embedded devices. In our thesis, we present three KVM interpreter optimization schemes based on the NAND+RAM memory architecture and the drawback of NAND page sequential access latency. By reducing of page fault ratio from NAND to RAM, the J2ME execution performance and the NAND flash energy consumption will both be decreased.
NAND flash has the nature of high density and low cost. With the shadowing technique support, NAND flash will replace NOR flash for the embedded memory system code storage in nearly future. The more advanced solution is NAND+RAM. Neither NOR flash memory nor mask ROM is used in this architecture; it uses NAND flash memory for code storage. Copying the whole software executable binary code into RAM offers the best performance possible at run time.
With the advantage of portability, it is more important to implement Java system for embedded devices. The performance is a major drawback of Java system, especially for resource-limited embedded devices. Therefore, if becomes an interesting topic to improve the Java performance for embedded devices. In our thesis, we present three KVM interpreter optimization schemes based on the NAND+RAM memory architecture and the drawback of NAND page sequential access latency. By reducing of page fault ratio from NAND to RAM, the J2ME execution performance and the NAND flash energy consumption will both be decreased.
Subjects
Java虛擬機器
省電
快閃記憶體
嵌入式系統
Java
NAND Flash
KVM
J2ME
Flash Memory
Lower Power
Virtual Machine
uClinux
ARMulator
SDGs
Type
thesis
File(s)
No Thumbnail Available
Name
ntu-94-R92922104-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):a2a129f28d72be2402ecfe51ce4c3522