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  4. Effects of Rapid Thermal Process and Scribing on the Characteristics of Silicon Metal-Oxide-Semiconductor (MOS) Devices
 
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Effects of Rapid Thermal Process and Scribing on the Characteristics of Silicon Metal-Oxide-Semiconductor (MOS) Devices

Date Issued
2004
Date
2004
Author(s)
Lin, Hao-Peng
DOI
en-US
URI
http://ntur.lib.ntu.edu.tw//handle/246246/57480
Abstract
With the ultra fast advancement of IC design and semiconductor fabrication technology,every tiny detail in the process of semiconductor devices has become a key point to determine whether the electrical performance can be good or not. Especially, the quality of gate dielectric layer determines the reliability and electrical performance of ultra large scale integrated (ULSI) circuit. We focus on how the processes in repaid thermal processor (RTP) affect the electrical characteristics quality of gate dielectric layer. To start with, we observed the differences of the J-V curves of MOS (P) devices with different gate dielectric thicknesses. It seemed that there must be some relationship between the electrical performance and the way in which the gate dielectric layer was grown. In this thesis, we set up series of experiments to watch how the oxidation process affects the electrical characteristics and truly found some regularity between them. In chapter 2, we set up a series of experiments, which were all the same except for the oxidation temperature. Thus, MOS (P) devices of different gate dielectric thicknesses were obtained and measurements of J-V and C-V curve were made to compare their electrical characteristics. A special analysis method was used here to strengthen the regularity. The two current mechanisms of the leakage current and the saturation current of MOS (P) structures were proposed to explain our observation. In chapter 3, we replace the oxidation temperature factor with the oxidation pressure factor to do the same analysis. Another regularity between the J-V curves and oxidation pressures was found and we blamed the oxidation pressures for the major problem. Finally, TDDB measurements were made to support our supposition. In chapter 4, we studied the effects of external forces on MOS (P) devices. We continue the same fabrications and applied external force to deform the sample severely, scribing it into two halves. Over two hundred J-V and C-V measurements were made vertically and horizontally before and after cutting. Finally, we also concluded an equivalent effect of the scribing action by analyzing these J-V and C-V measurements. Finally, some other works around this thesis that remain to be done have been listed in chapter 5.
Subjects
氧化層
金氧半元件
MOS
Oxide
Type
thesis
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