A Miller Divider Based Clock Generator for MBOA-UWB Application
Date Issued
2005
Date
2005
Author(s)
Huang, Yen-Chuan
DOI
en-US
Abstract
Although it began as a military application dating from the 1960s, UWB has been redefined as a high data rate, short-range technology that specifically addresses emerging applications in the consumer electronics, personal computing and mobile device markets. Under the auspices of the MultiBand OFDM Alliance (MBOA), personal computers and mobile devices have endorsed an approach called MultiBand Orthogonal Frequency Division Multiplexing (MB-OFDM) as the UWB solution.
The MBOA UWB mode-1 system divides the 3.1-to-4.7-GHz spectrum into three sub-bands. The system requires band-switching time to be less than 9.5 ns. The traditional solution to synthesize the three carrier frequencies are employing single-sideband (SSB) mixing architecture. However, SSB mixing suffers from large carrier leakage and unwanted sideband due to the circuit mismatches.
In this thesis, a Miller divider based clock generator is proposed to generate the three carrier frequencies of the MBOA-UWB mode-1 system while achieving less than 9.5-ns frequency settling time. The proposed approach adds a feedback mixer in the traditional Miller divider structure and the desired output frequency is determined by the band-pass filter. A simple method is also introduced to estimate the frequency-switching time by transforming the circuit into a frequency-domain equivalent model. For saving chip area, active inductors are used in the circuit design and an optimization technique is also presented to optimize the proposed active inductor with minimum power consumption. The proposed concepts are demonstrated in a 0.18-μm CMOS technology.
Subjects
米勒除頻器
超寬帶系統
頻率合成器
Miller divider
UWB
frequency synthesizer
Type
thesis
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