A Limiting Swing Pipelined Analog to Digital Converter
Date Issued
2009
Date
2009
Author(s)
Tung, Cheng-Wei
Abstract
Analog to digital converters (A/D Converters) provide the link between the analog world and digital system . In different architectures, flash A/D converter employsarallelism sampling to achive a high conversion speed, but it suffers from large power and area . In the requirement of high resolution, the pipelined architectures more suitable . However, the accuracy of a pipelined A/D converter is susceptible to the imperfections of circuits and devices, such as non-linearity and bandwidth limitation . In this dissertation, replacing traditional sample and hold stages with limiting swing input stages in the pipelined A/D converter is proposed . According to the characteristic transfer curve of the limiting swingnput stages, the outputs of every pipelined stages are limited in a lower swing region to increase sampling rate and decrease the non-linear effects of the amplifiershich may operate in high swing region . The A/D converter which was fabricated in the TSMC0.35-μm2P4M CMOS technology . Operating at a 80MS/s sampling rate, the A/D converter achieves SNDR and SFDR of 33.25 dB and 53.60B . The chip occupies an area of 6.2 mm2 , and the powre consumption is 250mW with a single 3.3 V supply .
Subjects
Analog to digital converters
flash A/D converter
pipelined A/D converter
limiting swing input stage
Type
thesis
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