An Efficient Heuristic for Minimizing Maximum Lateness on Parallel Batch Machines.
Journal
Eighth International Conference on Intelligent Systems Design and Applications, ISDA 2008, 26-28 November 2008, Kaohsiung, Taiwan, 3 Volumes
Pages
621-627
Date Issued
2008
Author(s)
Abstract
Batch machines are common in many complex manufacturing systems like wafer fabrication facilities. They are characterized by multiple capacity and long processing times, and thus scheduling of them is important for raising the performance of the entire system. In this paper, we address the identical parallel batch machine scheduling problem considering incompatible job families and dynamic job arrivals. A local search-based heuristic is proposed to minimize maximum lateness. Performance of the proposed heuristic is compared with a state-of-the-art genetic algorithm-based approach, and the experimental results show that our approach is better than the benchmark approach in terms of both solution quality and computational efficiency.
SDGs
Type
conference paper