Skip to main content
English
中文
Log In
Email address
Password
Log in
Log in with ORCID
NTU Single Sign On
New user? Click here to register.
Have you forgotten your password?
Communities & Collections
Research Outputs
Fundings & Projects
People
Organizations
Statistics
Home
College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems
Details
Export
Statistics
Options
Show all metadata (technical view)
Constrained Via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems
Journal
Design Automation Conference
Pages
60-65
Date Issued
1991
Author(s)
Feng, Wu-Shiung
Chen, Sao-Jie
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0026175672&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/293550
Type
conference paper