Correction to ?雓?0-Gb/s Clock and Data Recovery Circuit in 0.18-?m CMOS Technology??"Lee

Journal

IEEE Journal of Solid-State Circuits

Journal Volume

40

Journal Issue

2

Pages

559-

Date Issued

2005

Author(s)

J. Razavi

DOI

10.1109/JSSC.2004.842373

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/501740

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008014487&doi=10.1109%2fJSSC.2004.842373&partnerID=40&md5=262edf81b64b47a132eca105719e1c7c

Type

other