A multi-band burst-mode clock and data recovery circuit
Journal
IEICE Transactions on Electronics
Journal Volume
E90-C
Journal Issue
4
Pages
802-810
Date Issued
2007-04
Author(s)
Abstract
A multi-band burst-mode clock and data recovery (BMCDR) circuit is presented. The available data rates are 2488.32 Mbps, 1244.16 Mbps, 622.08 Mbps, and 155.52 Mbps, which are specified in a gigabit-capable passive optical network (GPON) [1]. A half-rate and low-jitter gated voltage-controlled oscillator (GVCO) and a phase-controlled frequency divider are used to achieve the multi-band reception. The proposed BMCDR circuit has been fabricated in a 0.18 μm CMOS process. Its active area is 0.41 mm2 and consumes 70 mW including I/O buffers from a 1.8 V supply. Copyright © 2007 The Institute of Electronics, Information and Communication Engineers.
Subjects
Burst-mode; Clock and data recovery; Multi-band; Voltage-controlled oscillator
SDGs
Other Subjects
Bandwidth; Data reduction; Fiber optic networks; Jitter; Oscillators (electronic); Voltage control; Clock and data recovery; Gated voltage-controlled oscillator (GVCO); Voltage-controlled oscillators; Frequency dividing circuits
Type
journal article