Low-Voltage CMOS Frequency Synthesizer for ERMES Pager Application
Journal
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Journal Volume
48
Journal Issue
9
Pages
826-834
Date Issued
2001-09
Author(s)
Abstract
A low-voltage frequency synthesizer fabricated with a 0.35-/spl mu/m standard CMOS technology is presented. A 1 V dual-modulus prescaler using the dynamic back-gate forward bias method has been developed for low-voltage operation. The prescaler, including a preamplifier, measured at 1 V supply voltage has a maximum operating frequency of 170 MHz, and its power dissipation is only 0.9 mW. The voltage-controlled oscillator (VCO) in the frequency synthesizer is an LC-tank based oscillator. When locked at the oscillation frequency of 148 MHz, the measured phase noise of the VCO is -106 dBc/Hz at -100-kHz from the carrier. The whole power consumption of the frequency synthesizer is 10.5 mW.
SDGs
Type
journal article