Low-Power CMOS Inverter Using Homogeneous Monolayer WSe2 Channel with Polarity Control
Journal
IEEE Electron Device Letters
Start Page
1
End Page
1
ISSN
0741-3106
1558-0563
Date Issued
2025
Author(s)
Hsu, Ching-Hao
Hou, Fa-Rong
Hsu, Ta-Wei
Lin, Yu-Tung
Chou, Sui-An
Chang, Ming-Han
Chiu, Li-Ya
Huang, Zheng-Da
Ni, I-Chih
Chou, Ang-Sheng
Abstract
While performance metrics of innovative technology-nodes continue to improve rapidly, energy efficiency has not kept pace. In this work, we successfully constructed a homogeneous CMOS inverter using monolayer tungsten diselenide (WSe2), a promising candidate can maintain good mobility at atomic-level thickness and offers better resistance to short-channel effects. Through different contact engineering and passivation doping approaches, the polarity of WSe2 could be effectively tailored. These module improvements are helpful to investigate the impact on threshold voltage of several critical process steps and match performance of both n and p-type field-effect transistors with low effective oxide thickness back-gate dielectrics in enhancement-mode operation. In addition, the inverters demonstrate superior performance at a relevant supply voltage (VDD) of 1.5 V: voltage gain exceeding 10 V/V, noise margin over 80%, picowatt-range static-power consumption, and near-ideal switching voltage of half-VDD. Reaching these numbers simultaneously opens up the possibilities for future-generation applications of two-dimensional material-based electronic components.
SDGs
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Type
journal article