A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems
Journal
IEEE Transactions on Circuits and Systems I: Regular Paper
Journal Volume
65
Journal Issue
11
Pages
2844-2851
Date Issued
2018
Author(s)
Abstract
Millimeter-wave (mm-Wave) communication, operating from 30-to 300-GHz bands with wider available spectrum, has now emerged as a promising solution for future wireless systems. To reduce the hardware complexity of mm-Wave transceivers, beam-selection techniques combined with beamspace multiple-input multiple-output (MIMO) communications have been proposed in the literature. In such a system, beam selection is performed to exploit the near-sparse nature in the mm-Wave channel and, hence, is crucial to the system performance. This paper presents the world's first digital signal processing (DSP) architecture design for beam selection operation in an mm-Wave multi-user MIMO system. A computationally efficient beam-selection algorithm is first presented. Based on the proposed algorithm, a hardware-scalable beam selection processor is implemented using coordinate rotation digital computers arithmetic. To establish the validity of the concept, the proposed processor is implemented in a 40-nm CMOS technology, integrating 360k logic gates in an area of 0.5625 mm2, while dissipating 44 mW at 266 MHz in an MU-MIMO system with 16 beams and 8 users. © 2018 IEEE.
Subjects
Beam selection; beamspace MIMO; CORDIC; hybrid beamformer; mm-wave
SDGs
Other Subjects
Computer hardware; Digital computers; Digital signal processing; MIMO systems; Radio transceivers; Beam selection; Beam space; CORDIC; Hybrid beamformer; Mm waves; Millimeter waves
Type
journal article
