SI-aware layout and equalizer design to enhance performance of high-speed links in blade servers
Journal
IEEE 20th Topical Meeting on Electrical Performance of Electronic Packaging
Pages
199-202
Date Issued
2011-10
Author(s)
Abstract
With increasing demand on higher performance for high speed I/O links, the signal integrity-aware layout schemes and equalization have been attributed as the critical techniques to improve the eye diagram. This paper describes a synthetic design to enhance the system performance and its application to realistic high-speed blade servers. Simulation results are provided to validate the design concept, demonstrating significant improvement in eye height and width by 284% and 96.7%, respectively, for a SATA II link of 1.175m length and 3 Gb/s data rate.
SDGs
Type
conference paper