Publication:
A 20/10/5/2.5Gb/s power-scaling burst-mode CDR circuit using GVCO/Div2/DFF tri-mode cells

cris.lastimport.scopus2025-05-08T21:47:08Z
cris.virtual.departmentElectrical Engineeringen_US
cris.virtual.departmentElectronics Engineeringen_US
cris.virtual.departmentMediaTek-NTU Research Centeren_US
cris.virtual.orcid0000-0002-3765-2948en_US
cris.virtualsource.department24716fa1-4a5d-4ea6-b2c3-58180c981415
cris.virtualsource.department24716fa1-4a5d-4ea6-b2c3-58180c981415
cris.virtualsource.department24716fa1-4a5d-4ea6-b2c3-58180c981415
cris.virtualsource.orcid24716fa1-4a5d-4ea6-b2c3-58180c981415
dc.contributor.authorChe-Fu Liangen_US
dc.contributor.authorSHEN-IUAN LIUen_US
dc.date.accessioned2018-09-10T07:08:34Z
dc.date.available2018-09-10T07:08:34Z
dc.date.issued2008-02
dc.identifier.doi10.1109/isscc.2008.4523138
dc.identifier.scopus2-s2.0-49549083733
dc.identifier.urihttp://scholars.lib.ntu.edu.tw/handle/123456789/342657
dc.languageenen
dc.relation.ispartofInternational Solid-State Circuits Conferenceen_US
dc.relation.pages224-225
dc.sourceAH-anncc
dc.titleA 20/10/5/2.5Gb/s power-scaling burst-mode CDR circuit using GVCO/Div2/DFF tri-mode cells
dc.typeconference paper
dspace.entity.typePublication

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