An Accurate Prediction Method of Substrate Noise and Thermal Issue in 3-D ICs Based on Modified 3-D TLM

In this research, the influence of the substrate noise induced by the through silicon via in 3-D ICs is analyzed. An equivalent circuit model is proposed based on the 3-D transmission line matrix (3-D TLM) method. The proposed equivalent circuit model is able to predict the substrate noise accurately under extremely small P/D ratio of the TSVs, and the semiconductor effect is considered. To verify the proposed model, ANSYS HFSS and TCAD Sentaurus are used in frequency and time domain simulation. The proposed model can also be used in the heat generation prediction on the silicon substrate and the co-simulation with the active circuit.