A TDC-based Two-step Quantizer with Swapper Technique for a Multi-bit Continuous-time Delta-sigma Modulator
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
61
Journal Issue
2
Pages
75-79
Date Issued
2014-01
Author(s)
Abstract
A time-to-digital converter (TDC)-based two-step quantizer is proposed for a multibit continuous-time delta-sigma modulator (CTDSM). In the proposed time-domain quantizer, the barrel-shifting operation realizes the dynamic element matching (DEM) function inherently, eliminating an explicit DEM circuit and the associated circuit latency. The two-step quantization scheme further reduces the hardware and power consumption of a multibit TDC quantizer. A swapper technique, in addition to the inherent DEM, is incorporated to randomize the selection of the two banks of digital-to-analog converter cells, which ensure good linearity. A third-order CTDSM incorporating the proposed TDC-based two-step quantizer is fabricated in a 90-nm CMOS process. The modulator achieves a signal-to-noise-and-distortion ratio of 69.6 dB over a 1-MHz signal bandwidth. Operated from 1.2-V analog and 1-V digital supplies, the whole CTDSM consumes 1.79 mW and achieves a figure of merit of 361 fJ/conversion. © 2014 IEEE.
Subjects
Delta-sigma modulator; Inherent dynamic element matching (DEM); Time-domain quantizer
SDGs
Other Subjects
Continuous time systems; Delta sigma modulation; Digital to analog conversion; Frequency converters; Signal to noise ratio; Surveying; Time domain analysis; Delta sigma modulator; Dynamic element matching; Figure of merits; Quantization schemes; Quantizers; Signal bandwidth; Signal to noise and distortion ratio; Time to digital converters; Modulators
Type
journal article