CRC:低峰值功率可測試技術設計
Complemented Response Cell (CRC) : A Low Peak Power design for Testability Technique
Date Issued
2006
Date
2006
Author(s)
Chen, Bo-Hua
DOI
en-US
Abstract
This thesis presents a novel low peak power DFT technique, called Complemented Response Cell (CRC), to reduce the peak power at the system clock. This technique controls the data input of specified scan cells such that their contents remain unchanged before and after the system clock. A scoring method is proposed to select only a small number of scan cells replaced by CRC. The proposed technique is very different from the pervious technique is that it requires minimum change in the existing MUX-scan design for testability (DFT) methodology. According to the experimental data on ISCAS’89 benchmark circuits, the CRC technique reduces the peak power by up to 57% (S38417). In the CRC technique, neither extra control signal nor extra routing of scan chain is needed. Besides, there is no fault coverage loss and the area penalty is very small.
Subjects
測試技術
低功率
低峰值功率
測試
design-for-tes
low power
low peak power
testing
Type
thesis
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