A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering
Journal
2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Date Issued
2017
Author(s)
Tu, Yo-Hao
Yao, Kai-Wen
Huang, Ming-Hao
Lin, Yu-Yun
Chi, Hao-Yu
Cheng, Po-Min
Shiue, Muh-Tian
Liu, Chien-Nan
Cheng, Kuo-Hsing
Fu, Jia-Shiang
Abstract
A body sensor node system-on-chip (SoC) is designed and implemented. The SoC integrates analog front end (AFE), a high-resolution analog-to-digital converter (ADC), an RF-to-DC rectifier, a low dropout (LDO) regulator, and a digital signal processing (DSP) block. The batteryless SoC is powered by RF of 2.45GHz. The rectifier generates 1.8V output and the LDO converts the voltage to stable 1.6V supply for AFE, ADC, and DSP blocks. A pseudo-resistor with huge resistance is used in AFE to support tunable low cut-off frequency and to facilitate compact SoC integration. The DSP can be set to deliver raw data, wavelet-domain data, and compressed-sensing (CS) data. The entire SoC is 1.7×2.5 mm2 and can support invasive/non-invasive health-monitoring with low power consumption. © 2017 IEEE.
Event(s)
2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Description
Hsinchu, 24 April 2017 through 27 April 2017
Type
conference paper