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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Automatic Partitioner for Distributed Parallel Logic Simulation
Details
Automatic Partitioner for Distributed Parallel Logic Simulation
Journal
15th VLSI Design/CAD Symposium
Date Issued
2004-08
Author(s)
K. H. Chang
H. W. Wang
Y. J. Yeh
SY-YEN KUO
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/310557
Type
conference paper