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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
~20% Idsat improvement in the Si 3D FinFET with the implement of D-SMT process
Details
~20% Idsat improvement in the Si 3D FinFET with the implement of D-SMT process
Journal
9th International Conference on Silicon Epitaxy and Heterostructures
Date Issued
2015
Author(s)
M. H.Liao
P.-G. Chen
C. P. Hsieh
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/404520
Description
Canada
Type
conference proceedings
