Smart cache: An energy-efficient D-cache for a software MPEG-2 video decoder
Resource
Information, Communications and Signal Processing, 2003 and the Fourth Pacific Rim Conference on Multimedia. Proceedings of the 2003 Joint Conference of the Fourth International Conference on
Journal
2003 Joint Conference of the 4th International Conference on Information, Communications and Signal Processing and 4th Pacific-Rim Conference on Multimedia
Journal Volume
3
Pages
1660-1664
Date Issued
2003
Author(s)
Abstract
Power consumption is an important design issue of current embedded systems. Data caches consume a significant portion of total processor power for data intensive applications. In this paper, we propose to utilize application-specific information for cache resource allocation to achieve energy saving, including cache bypassing, the mini-cache and way-partition. We use a software MPEG-2 video decoder as our first targeted application. Cache bypassing excludes data types that have little reuse from the LI cache. The mini-cache stores data types with high access frequency and small memory footprints to a small on-chip memory area The way-partition mechanism maps program data structures to different ways of caches and enables only the matching ways on each access. The results show up to 40% of cache energy reduction without sacrificing performance. © 2003 IEEE.
SDGs
Other Subjects
Application programs; Decoding; Embedded systems; Energy conservation; Energy efficiency; Microprocessor chips; Motion Picture Experts Group standards; Multimedia signal processing; Signal processing; Access frequency; Application specific; Data-intensive application; Energy efficient; Mechanism maps; On chip memory; Processor power; Small memory footprint; Cache memory
Type
conference paper
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