A Novel Methodology to Minimize Spurious Operations for Low Power Register Allocation

A functional unit consumes dynamic power when a switching activity occurs which means the input values in the registers have changed. We call the occurrence of a switching activity to be spurious when the functional unit is in “idle”. Thereby the assignment method of input variables determines whether or not spurious operations get executed by functional units. Previous researches have presented a variable assignment technique which, when used in high-level synthesis, suppresses spurious operations without adding latches or any other circuitry in front of functional units or registers. In this thesis, we propose the novel methodology and efficient algorithms to solve the variable assignment problem optimally. We apply a graph-theoretical solution of formulating the register assignment problem as a minimum cost clique covering of an appropriately defined compatibility graph and solve it with a max-cost flow algorithm, where the cost function is defined by using the number of spurious operations. Experimental results confirm the viability and usefulness of the approach in minimizing spurious operations during the register assignment phase of the behavioral synthesis process.