https://scholars.lib.ntu.edu.tw/handle/123456789/118506
標題: | Configurable NAND Flash Translation Layer | 作者: | Tsai, Yi-Lin Hsieh, Jen-Wei TEI-WEI KUO |
公開日期: | 2006 | 卷: | 2006 II | 起(迄)頁: | 118-125 | 來源出版物: | Proceedings - IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing | 摘要: | Flash memory is widely adopted in various consumer products, especially for embedded systems. With strong demands on product designs for overhead control and performance requirements, vendors must have an effective design for the mapping of logical block addresses (LBA's) and physical addresses of data over flash memory. This paper targets such an essential issue by proposing a configurable mapping method that could trade the main-memory overhead with the system performance under the best needs of vendors. A series of experiments is conducted to provide insights on different configurations of the proposed method. © 2006 IEEE. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-33845391997&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/323638 http://ntur.lib.ntu.edu.tw/bitstream/246246/232858/-1/19.pdf |
DOI: | 10.1109/SUTC.2006.1636167 | SDG/關鍵字: | Consumer products; Embedded systems; Flash memory; Product design; Configurable mapping method; Logical block addresses (LBA); Main memory overhead; Vendors; NAND circuits |
顯示於: | 資訊工程學系 |
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