https://scholars.lib.ntu.edu.tw/handle/123456789/153176
標題: | Radix-2k Viterbi decoding with transpose path metric processor | 作者: | Lee, Wen-Ta Chen, Thou-Ho LIANG-GEE CHEN |
公開日期: | 十二月-1994 | 出版社: | Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems | 起(迄)頁: | 194 - 199 | 來源出版物: | IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings | 摘要: | In this paper, we present a radix-2k Viterbi decoding with Transpose Path Metric (TPM) processor. The TPM processor can provide a permutation function for state rearrangement with simple local interconnection. For interconnection realization, the routing complexity is less than that of the delay-commutator reported previously. In addition, a higher memory length Viterbi processor can be constructed with lower radix-2k modules. With features of modulation and cell regularity, the radix-2k Viterbi decoding with TPM processor is very suitable for VLSI implementation. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032410 https://www.scopus.com/inward/record.uri?eid=2-s2.0-0028739717&partnerID=40&md5=fe1800af4fc0d0338690f4bd0248300f |
其他識別: | N/A | DOI: | 10.1109/APCCAS.1994.514548 | SDG/關鍵字: | Algorithms; Computational complexity; Graph theory; Iterative methods; Trellis codes; VLSI circuits; Add compare select; Transpose path metric processor; Trellis diagram; Viterbi decoding; Decoding |
顯示於: | 電機工程學系 |
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00514548.pdf | 553.09 kB | Adobe PDF | 檢視/開啟 |
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