Test set compaction for combinational circuits
Resource
Test Symposium, 1992. (ATS '92), Proceedings., First Asian (Cat. No.TH0458-0)
Journal
Test Symposium, 1992. (ATS '92)
Pages
Proceeding-s
Date Issued
1992-11
Date
1992-11
Author(s)
Chang, Jau-Shien
Lin, Chen-Shang
DOI
N/A
Abstract
Test set compaction for combinational circuits is studied. Two active compaction methods, forced pair-merging and essential fault pruning, are developed to reduce a given test set. Together these two methods, the compacted test size is smaller than known best results by more than 20% and is only 20% larger than the established lower bound.>
Type
journal article
File(s)![Thumbnail Image]()
Loading...
Name
00224429.pdf
Size
473.02 KB
Format
Adobe PDF
Checksum
(MD5):186e53655bee451a350d3c65441ac90d