Unified fully-pipelined VLSI implementations of two-dimensional discrete trigonometric transforms
Resource
Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on
Journal
The 1998 IEEE Asia-Pacific Conference on Circuits and Systems
Pages
-
Date Issued
1998-11
Date
1998-11
Author(s)
DOI
N/A
Abstract
This paper describes a unified VLSI architecture which can efficiently realize some popular two-dimensional discrete trigonometric transforms (2-D DTT). The computation of the 2-D DTT is based on the row-column decomposition approach. However, in contrast to previous schemes, efficient and unrestricted Clenshaw's recurrence formula along with the inherent symmetry of the trigonometric functions are adequately employed to render efficient recurrences for computing both of the row and column transforms. As such, the resulting VLSI architecture not only provides substantial hardware savings as compared with previous works, but it can also be applied to the 2-D DTT of arbitrary size. An input buffer along with a bidirectional circular shift matrix are addressed as well to enable the architecture to operate in a fully-pipelined manner.
SDGs
Type
journal article
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