https://scholars.lib.ntu.edu.tw/handle/123456789/154793
標題: | Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems | 作者: | SHAO-YI CHIEN Hsieh, Bing-Yu Huang, Yu-Wen Ma, Shyh-Yih LIANG-GEE CHEN |
關鍵字: | Hardware architecture; Morphological operations; Moving object segmentation; Video segmentation | 公開日期: | 2006 | 卷: | 42 | 期: | 3 | 起(迄)頁: | 241-255 | 來源出版物: | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology | 摘要: | Video segmentation is a key operation in MPEG-4 content-based coding systems. For real-time applications, hardware implementation of video segmentation is inevitable. In this paper, we propose a hybrid morphology processing unit architecture for real-time moving object segmentation systems, where a prior effective moving object segmentation algorithm is implemented. The algorithm is first mapped to pixel-based operations and morphological operations, which makes the hardware implementation feasible. Then the high computation load, which is more than 4.2 GOPS, can be overcome with a dedicated morphology engine and a programmable morphology PE array. In addition, the hardware cost, memory size, and memory bandwidth can be reduced with the partial-result-reuse concept. This chip is designed with TSMC 0.35 μm 1P4M technology, and can achieve the processing speed of 30 QCIF frames or 7,680 morphological operations per second at 26 MHz. Simulation shows that the proposed hardware architecture is efficient in both hardware complexity and memory organization. It can be integrated into any content-based video processing and encoding systems. © 2006 Springer Science + Business Media, Inc. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-33646534415&doi=10.1007%2fs11265-006-4185-1&partnerID=40&md5=9648b900e06846cd647fb8dcd5a4ac2f http://scholars.lib.ntu.edu.tw/handle/123456789/321222 http://ntur.lib.ntu.edu.tw/bitstream/246246/141454/1/92.pdf |
ISSN: | 13875485 | DOI: | 10.1007/s11265-006-4185-1 | SDG/關鍵字: | Content-based coding systems; Hardware architecture; Object segmentation systems; Processing unit architecture; Algorithms; Computation theory; Computer architecture; Computer hardware; Image compression; Morphology; Real time systems; Image segmentation |
顯示於: | 電機工程學系 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。