https://scholars.lib.ntu.edu.tw/handle/123456789/289909
Title: | Hard ware-software timing co-verification of distributed embedded systems | Authors: | Jih-Ming, F.U. Lee Trong-Yen Hsiung, P.-A. SAO-JIE CHEN |
Keywords: | Coverification; Distributed embedded systems; Hard deadline; Hardware-software codesign; Linear hybrid automata | Issue Date: | 2000 | Journal Volume: | E83-D | Journal Issue: | 9 | Start page/Pages: | 1731-1740 | Source: | IEICE Transactions on Information and Systems | Abstract: | Most of current codesign tools or methodologies only support validation in the form of cosimulation and testing of design alternatives. The results of hardware-software codesign of a distributed system are often not verified, because they are not easily verifiable. In this paper, we propose a new formal coverification approach based on linear hybrid automata, and an algorithm for automatically converting codesign results to the linear hybrid automata framework. Our coverification approach allows automatic verification of real-time constraints such as hard deadlines. Another advantage is that the proposed approach is suitable for verifying distributed systems with arbitrary communication patterns and system architecture. The feasibility of our approach is demonstrated through several application examples. The proposed approach has also been successfully used in verifying deadline violations when there are inter-task communications between tasks with different period lengths. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-0034272095&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/289909 |
ISSN: | 09168532 | SDG/Keyword: | Coverification method; Hardware-software codesign; Algorithms; Automata theory; Computer hardware; Computer software; Constraint theory; Distributed computer systems; Embedded systems |
Appears in Collections: | 電機工程學系 |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.