Skip to main content
English
中文
Log In
Log in
Log in with ORCID
NTU Single Sign On
Have you forgotten your password?
Home
College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Inductance modeling for on-chip interconnects
Details
Inductance modeling for on-chip interconnects
Journal
IEEE International Symposium on Circuits and Systems
Journal Volume
3
Date Issued
2002
Author(s)
Tu, S.-W.
Shen, W.-Z.
Chang, Y.-W.
Chen, T.-C.
YAO-WEN CHANG
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0036290945&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/298317
Type
conference paper