https://scholars.lib.ntu.edu.tw/handle/123456789/317724| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sung-Rung Han | en-US |
| dc.contributor.author | Shen-Iuan Liu | en-US |
| dc.contributor.author | SHEN-IUAN LIU | zz |
| dc.creator | Sung-Rung Han;Shen-Iuan Liu | - |
| dc.date.accessioned | 2018-09-10T05:27:03Z | - |
| dc.date.available | 2018-09-10T05:27:03Z | - |
| dc.date.issued | 2005-05 | - |
| dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/317724 | - |
| dc.language | en | en |
| dc.relation.ispartof | IEEE Journal of Solid-State Circuits | - |
| dc.source | AH-anncc | - |
| dc.title | A single-path pulsewidth control loop with a built-in delay-locked loop | - |
| dc.type | journal article | en |
| dc.identifier.doi | 10.1109/JSSC.2005.845988 | - |
| dc.identifier.scopus | 2-s2.0-18444379029 | - |
| dc.identifier.isi | WOS:000228773600010 | - |
| dc.relation.pages | 1130-1135 | - |
| dc.relation.journalvolume | 40 | - |
| dc.relation.journalissue | 5 | - |
| item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
| item.cerifentitytype | Publications | - |
| item.fulltext | no fulltext | - |
| item.grantfulltext | none | - |
| item.openairetype | journal article | - |
| crisitem.author.dept | Electrical Engineering | - |
| crisitem.author.dept | Electronics Engineering | - |
| crisitem.author.dept | MediaTek-NTU Research Center | - |
| crisitem.author.orcid | 0000-0002-3765-2948 | - |
| crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
| crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
| crisitem.author.parentorg | Research Center | - |
| Appears in Collections: | 電機工程學系 | |
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