A 9.5-dB 50-GHz Matrix Distributed Amplifier in 0.18-μm CMOS
Journal
Symposium on VLSI Circuits
Pages
182-183
Date Issued
2006-06
Author(s)
Abstract
Implemented in a 0.18-mum CMOS process, a 2times4 matrix amplifier is presented in this paper. Due to the use of the second-tier gain cells in the distributed amplifier architecture, the proposed circuit exhibits a remarkable nominal gain of 9.5 dB with a 3-dB bandwidth of 50 GHz while maintaining input and output return losses better than 10 dB over the entire frequency band. A gain-bandwidth product of 150 GHz is demonstrated in this work
SDGs
Type
conference paper