A 26mW 6.4GFLOPS multi-core stream processor for mobile multimedia applications
Journal
IEEE Symposium on VLSI Circuits
Pages
24-25
Date Issued
2008
Author(s)
Tsao, Y.-M.
Sun, C.-H.
Lin, Y.-C.
Lok, K.-H.
Hsu, C.-J.
Chien, S.-Y.
Chen, L.-G.
Abstract
A 26 mW 6.4 GFLOPS multi-core stream processor for mobile applications is implemented in 90 nm CMOS technology. A unified stream processing architecture with power-aware frequency scaling and adaptive task scheduling techniques are proposed to reduce the power consumption and increase the performance to achieve the performance of 200 Mvertices/s and 400 Mpixels/s in 3D graphic applications.
SDGs
Type
conference paper