https://scholars.lib.ntu.edu.tw/handle/123456789/342491| Title: | Fewest vias design for microstrip guard trace by using overlying dielectric | Authors: | Y.-S. Cheng W.-D. Guo G.-H.Shiue H.-H. Cheng C.-C. Wang R.-B. Wu RUEY-BEEI WU |
Issue Date: | Oct-2008 | Start page/Pages: | 321-324 | Source: | IEEE 17th Topical Meeting on Electrical Performance of Electronic Packaging | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/342491 | DOI: | 10.1109/EPEP.2008.4675945 |
| Appears in Collections: | 電機工程學系 |
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