https://scholars.lib.ntu.edu.tw/handle/123456789/342781| Title: | Power integrity chip-package-PCB co-Simulation for I/O interface of DDR3 high-speed memory | Authors: | H.-H. Chuang S.-J. Wu M.-Z. Hong D. Hsu R. Huang T.-L. Wu TZONG-LIN WU |
Issue Date: | Dec-2008 | Start page/Pages: | 31-34 | Source: | Elect. Design Adv. Packag. Systems Symp. | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/342781 | DOI: | 10.1109/EDAPS.2008.4735991 |
| Appears in Collections: | 電機工程學系 |
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