https://scholars.lib.ntu.edu.tw/handle/123456789/351956| Title: | Design Optimization of Low-Power 90nm CMOS SOC Applications Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS) BP-DTMOS-DT Technique | Authors: | JAMES-B KUO | Issue Date: | Sep-2009 | Source: | Power and Timing Optimization Symposium | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/351956 |
| Appears in Collections: | 電機工程學系 |
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