https://scholars.lib.ntu.edu.tw/handle/123456789/352067
標題: | A 10Gb/s inductorless CMOS analog equalizer with interleaved active feedback topology | 作者: | Jian-Hao Lu Ke-Hou Chen SHEN-IUAN LIU |
關鍵字: | Active feedback; CMOS; Equalizer; Inductorless | 公開日期: | 二月-2009 | 卷: | 56 | 期: | 2 | 起(迄)頁: | 97-101 | 來源出版物: | IEEE Transactions on Circuits and Systems II: Express Briefs | 摘要: | A 10-Gb/s low-power analog equalizer for a 10-m coaxial cable has been realized in 0.13-μm CMOS technology. To compensate the cable loss of 20 dB at 5 GHz, this equalizer with an interleaved active feedback topology is proposed without using inductors. Moreover, additional capacitive and resistive source degenerations are incorporated to meet low-frequency losses. This circuit consumes only 14 mW (excluding the output buffer) from a 1.2-V supply with the output swing up to 400 mVpp, and it occupies 0.38 × 0.34 mm2. For 8-, 9-, and 10-Gb/s pseudorandom binary sequences (PRBSs) of 231 - 1, the measured maximum peak-to-peak jitters are 26, 34, and 40 ps, respectively, and the measured bit error rate (BER) is less than 10-12. © 2009 IEEE. |
URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/352067 https://www.scopus.com/inward/record.uri?eid=2-s2.0-62749193828&doi=10.1109%2fTCSII.2008.2010177&partnerID=40&md5=4423257c8b7e0225349d5e8ca16b932a |
ISSN: | 15497747 | DOI: | 10.1109/TCSII.2008.2010177 | SDG/關鍵字: | Binary sequences; Bit error rate; Cables; CMOS integrated circuits; Electric inductors; Equalizers; Topology; Active feedback; Active feedback topology; Analog equalizers; CMOS technology; Inductorless; Output Buffer; Pseudo-random binary sequences; Source degeneration; Feedback |
顯示於: | 電機工程學系 |
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